Magnetic memory devices (semiconductor integrated circuit devices) comprising transistors and magnetoresistive effect elements integrated on a semiconductor substrate have been proposed. The magnetoresistive effect element, in general, comprises a storage layer, a reference layer and a tunnel barrier layer provided between the storage layer and the reference layer.
In the magnetoresistive effect element, it is possible to set to one of a low-resistance state and a high-resistance state based on the direction of a current and to store data (binary 0 or 1) based on these two states. To the above-described magnetoresistive effect element, a transistor is connected in series. By setting the transistor to an on state, a current flows through the magnetoresistive effect element, and based on the direction of the current, one of the low-resistance state and the high-resistance state is set in the magnetoresistive effect element.
However, in the above-described conventional magnetic memory device, the following problem arises in a write operation. That is, when the magnetoresistive effect element transitions from the low- to the high-resistance state by feeding a current through the series circuit of the magnetoresistive effect element and the transistor, a high voltage is applied to the magnetoresistive effect element. When the magnetoresistive effect element is subjected to a high voltage, the tunnel barrier layer is also subjected to the high voltage, and thus there is a problem of the reliability of the tunnel barrier layer deteriorating.
Therefore, there is demand for a magnetic memory device which can prevent a magnetoresistive effect element from being subjected to a high voltage in a write operation.